发明名称 Method of fabricating high speed CMOS devices
摘要 In order to reduce the mechanical stress that occurs at the interface of a layer of a refractory metal silicide and a layer of silicon dioxide, it is proposed that a buffer layer of polycrystalline silicon be interposed between the two layers. To accomplish this and prior to forming contact openings, the buffer layer of polycrystalline silicon is deposited on the layer of silicon dioxide and the structure is then provided with an apertured mask to define the contact openings. The structure is then initially etched through both the buffer layer and the underlying layer of silicon dioxide in order to expose portions of the buried contact regions followed by a second etch of only the buffer layer to only expose portions of the layer of silicon dioxide in order to form a gate member and any required interconnects. The process further includes the formation of a layer of metal silicide on the interconnects, in the contact openings and on the gate member.
申请公布号 US4519126(A) 申请公布日期 1985.05.28
申请号 US19830560459 申请日期 1983.12.12
申请人 RCA CORPORATION 发明人 HSU, SHENG T.
分类号 H01L21/768;H01L21/8238;(IPC1-7):H01L21/283 主分类号 H01L21/768
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