| 摘要 |
PURPOSE:To speed up the converting time and to decrease the number of elements and power consumption by adopting the circuit constitution that all digital signals are outputted by one clock operation. CONSTITUTION:An analog input signal A1 at a terminal 1-1 is compared by a comparator 3-1 and its result is outputted to a digital signal output terminal 6-1. A voltage of 1/2F.S is applied to a terminal 7-1 as a reference voltage VREF1 in this case. When information at the terminal 6-1 is at H level, switch circuits 11-11, 11-12 are driven to flow a constant current generated at constant current source circuits 12-11, 12-12 to level shift circuits 10-2, 10-3. Then a voltage of 1/2F.S is caused to the circuits activated to supply the analog signal from the terminal 1-1 to input terminals 1-2, 1-3 as an analog signal A2 subject to 1/2F.S level shift-down. |
