| 摘要 |
PURPOSE:To control the speed of a motor which has low power consumption by detecting the phase difference between a signal of a motor frequency generator and a reference clock corresponding to the target speed and controlling the power by the phase difference signal, thereby limiting the excess supply power. CONSTITUTION:A phase detector 3 outputs a phase difference signal between a reference clock phiS and the frequency signal phiM of a motor 5. An AND gate 12 extracts the superposed portion between the output Q3 of a memory 11 showing that the previous signal phiM is earlier than the prescribed time and the output Q2 of a memory 10 showing that the present symbol phiM is delayed from the prescribed time, and passes the 75% duty command signal from a coefficient generator 9. An OR gate 16 applies the output of the detector 3 when the AND gate 12 produces no output and the output of the generator 9 when the gate 12 produces an output to the motor 5 through an amplifier 4. |
