| 发明名称 |
CIRCUIT FOR RELIABLE DATA TRANSFER BETWEEN TWO CENTRAL PROCESSING UNITS |
| 摘要 |
<p>CIRCUIT FOR RELIABLE DATA TRANSFER BETWEEN TWO CENTRAL PROCESSING UNITS This circuit provides a minimally sized data transfer buffer interface between two central processing units for transferring data blocks of variable size. The circuit provides an indication to one CPU that the other CPU has received all the data words transmitted.</p> |
| 申请公布号 |
CA1187619(A) |
申请公布日期 |
1985.05.21 |
| 申请号 |
CA19830429474 |
申请日期 |
1983.06.01 |
| 申请人 |
GTE AUTOMATIC ELECTRIC INCORPORATED |
发明人 |
KRIKOR, KRIKOR A.;HU, KUANG-CHENG |
| 分类号 |
G06F13/28;G06F15/167;(IPC1-7):G11C9/00 |
主分类号 |
G06F13/28 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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