Buffer circuit for driving a C-MOS inverter

摘要

A buffer circuit for driving a C-MOS inverter, including a first inverter and a second inverter for driving a p-MOS transistor, respectively, and an n-MOS transistor in the C-MOS inverter. Each of the inverters includes at least three transistors connected in series. At least one of the three transistors in each inverter is driven by a delay circuit so that during a transition period of the C-MOS inverter, simultaneous conduction of current through the C-MOS inverter is prevented.