Ga/As NOR/NAND gate circuit using enhancement mode FET's

摘要

In an integrated logic circuit employing normally-off type FET's, it is difficult, but desirable to realize a NAND gate due to unwanted flow of the forward current to the next stage. In accordance with the invention, a stable NAND gate operation can be realized by introducing a NOR gate into all gate electrodes of the inputs of the NAND gate, except one gate electrode thereof of which source is grounded.