| 摘要 |
<p>The parallel D/A converter, for 8-bit PCM words (with sign bit, 3 bits for a binary number determining the segment of the CCITT's rule A, and 4 bits for a second binary number determining the position within the segment), has a switch (21-26) associated with each input to the resistor weighting network (R1, r2). An exclusive-OR gate (11-16) is connected to the input of each switch and by its first input to one of the PCM input terminals (B) for the second binary number. The second inputs of all these exclusive-OR gates are coupled to the sign bit input (VZ). The PCM inputs for the first binary word are connected to another circuit.</p> |
