发明名称 LINE ASSIGNING SYSTEM
摘要 PURPOSE:To make the amount of data communication uniform by assigning a low-speed channel to a high-speed side line with less data communication amount dynamically in assigning the low-speed channel to the high-speed side line. CONSTITUTION:When input data is incoming, the value of a data speed used in a channel is transmitted to an assigning circuit 103. The assigning circuit 103 adds the value of data speed transmitted from a registration line 101 to a smaller value at present point of time provided in adders/subtractors built in each of high-speed two lines and assigns the low-speed channel to the high-speed line. Moreover, a cancelling circuit 102 detects the end of input data, this information is transmitted to the assigning circuit 103 to cancel the assignment of the low- speed channel assigned to one of the high-speed lines and to subtract the value of the data speed of the channel from the adder/subtractor.
申请公布号 JPS6089141(A) 申请公布日期 1985.05.20
申请号 JP19830197920 申请日期 1983.10.21
申请人 NIPPON DENKI KK 发明人 TAKAYAMA MICHIO
分类号 H04J3/16;H04L5/22 主分类号 H04J3/16
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