发明名称 PROGRAMMABLE MEMORY
摘要 <p>PURPOSE:To attain sure check at all times by providing respectively a dummy cell to each row or column, writing a code added with an even number parity to the row dummy cells in the order of address and arranging alternately 0s and 1s. CONSTITUTION:The dummy cell is arranged at each cross point among row addresses 143, 144 and column addresses 000C-100C by using the dummy row addresses 143, 144, the row dummy cell 141 is arranged to the row address 143 and the row dummy cell 142 is arranged to the row address 144. The cell 141 is arranged so as to repeat logical information sequentially as ''0'', ''1'', ''0'', ''1''- from the column address 000C to 100C, and the cell 142 is written as reverse logical information inverse to the address 141 for the same column addresses from the column address 000C to 100C. On the other hand, memory cells 131, 132 are arranged as to each cross point of each column and row address 000R-100R of the dummy column addresses 133, 134 as to the columns.</p>
申请公布号 JPS6089900(A) 申请公布日期 1985.05.20
申请号 JP19840143602 申请日期 1984.07.11
申请人 NIPPON DENKI KK 发明人 MAYUMI HIROSHI
分类号 G11C29/00;G11C17/00;G11C29/08;G11C29/24 主分类号 G11C29/00
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