摘要 |
PURPOSE:To correct automatically fluctuation of lock phase due to aging change or temperature change by controlling a multiplier circuit in response to a phase difference of inputted and regenerated digital data. CONSTITUTION:When a signal S1 shown in A is inputted from an input terminal 1 to a saw tooth wave generating circuit 21a, the circuit 21a outputs a signal Sw shown in B based on the signal S1 and the signal Sw is fed to a non-inverting input terminal of a comparator 21b. On the other hand, a slice level SL functioning as a reference signal is fed to an inverting input terminal of the comparator 21b, and a signal S2 shown in C is extracted at an output of the comparator 21b. The signal S2 is fed to a PLL circuit 3 and phase-locked with a phase difference of 90 deg. and a sampling pulse is fed to a clock terminal of an FF4. Since the level SL is controlled in response to the phase difference of the input and regnerated digital data in this case, the lock phase is adjusted automatically. |