| 摘要 |
PURPOSE:To carry out the transmission and reception of the data of the input and output circuit and the central operation processing circuit in the same manner as those of the memory circuit and the central operation processing circuit by using a partial region of the memory circuit simultaneously with the address specification of the input and output circuit. CONSTITUTION:When CPU outputs the address assigned to the input and output circuit 22 as an address signal 23, this is detected by the decoder 32 to control the input and output circuit 22 under the condition of the entry of the memory write signal 24 and the memory read signal 25. At this time, the memory write signal 24 and the memory read signal 25 are not outputted to the memory circuit. Then, when the test mode switch 31 is set at test mode, the memory write signal 24 and the memory read signal 25 are outputted to the memory circuit in order to data transmit the diagnosis program stored in the memory circuit 21 to CPU. At this time, the address assigned to the input and output circuit 22 is replaced by the diagnosis program, so that the memory write signal 24 and the memory read signal are not outputted to the input and output circuit 22. |
