发明名称 |
Circuit arrangement for time-offset compensation in multi-channel line printers |
摘要 |
In a multi-channel line printer, the printing elements are spatially offset. In order nevertheless to print simultaneous events with the same abscissas, the input signals are digitised by means of an A/D converter (22). The signals in the second and third channels are stored by the memories 300, 302 and are output in a delayed manner. Sampling takes place at twice the mains frequency. However, maximum and minimum values are formed over relatively long intervals which are determined by a programmable frequency divider 122. Only these maximum and minimum values are supplied to the memories 298, 300, 302. Simple hard-wired logic for controlling the sequence is described. <IMAGE>
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申请公布号 |
DE3340275(A1) |
申请公布日期 |
1985.05.15 |
申请号 |
DE19833340275 |
申请日期 |
1983.11.08 |
申请人 |
EME ENTWICKLUNGSGESELLSCHAFT FUER MIKROELEKTRONIK MBH |
发明人 |
KORYBUT-DASZKIEWICZ,OLGIERD,DR. |
分类号 |
G01D9/06;G11C7/16;(IPC1-7):G01D3/02;G01R13/04;G11C7/00 |
主分类号 |
G01D9/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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