发明名称 MOS INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a stable output voltage against variation in element characteristics by utilizing a voltage sum of threshold voltages of a couple of a P- channel MOSFET and an N-channel MOSFET whose gates and drains are used in common so as to form a unit reference voltage. CONSTITUTION:Since a couple of P-channel MOSFET and an N-channel MOSFET are used, a sum voltage of threshold voltages Tthp and Vthn is obtained between both sources, after the MOSFETs are brough into on-state. Thus, a current does not flow before a power supply voltage Vcc is 2(Vthp+Vthn), and the current does not flow at a voltage below the said voltage. The variation of the threshold voltages Vthp and Vthn of the P-channel MOSFET and the N- channel MOSFET due to fluctuation of the density of a well region and ion implantation amount produced in the process of CMOS integrated circuits appears so as to be cancelled to each other. Thus, the sum of the voltages (Vthp+Vthn) of both threshold voltages is made nearly constant against process variation.
申请公布号 JPS6085622(A) 申请公布日期 1985.05.15
申请号 JP19830192379 申请日期 1983.10.17
申请人 HITACHI SEISAKUSHO KK 发明人 KOTANI HIROAKI
分类号 H03K3/02;H03K17/22;H03K19/00;H03K19/003 主分类号 H03K3/02
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