| 摘要 |
PURPOSE:To suppress the concentration of electric field as well as to contrive reduction in gate leak of the title semiconductor device by a method wherein, after an element isolation region has been formed, the corners on the circumference of the element forming region are rounded off by performing a high temperature heat treatment before conducting a gate oxidation. CONSTITUTION:An anisotropic etching is performed on the face (100) of a P type Si substrate 31 by providing a mask 32, a tilt-faced groove 34 is formed, and B<+> ions are implanted. When the mask 32 is removed, an SiO2 35 is buried flatly and the surface of Si is exposed, the corner 36 of Si is exposed on the circumference of the element forming region. The Si-SiO2 interface of the corner 36 can be rounded off when an SiO2 37 is formed at the softening point of SiO2 which is approximately 965 deg.C or above. The SiO2 37 is entirely removed by etching, a gate oxide film 38 and a gate electrode 39 are formed using a publicly known method, a source and a drain are provided, and an FET is completed. As no electric field is concentrated on the corner of the circumference of the element forming region, a gate leak is reduced and element characteristics can be improved. |
