| 摘要 |
PURPOSE:To eliminate adverse effect of signal jitter onto synchronization by using a stuff control signal for the control of generation of a reset pulse of a phase comparator circuit. CONSTITUTION:A latch circuit 25 is set when the phase difference between a write pulse 12 and a read pulse 13 is decreased and applies a signal A to a stuff control signal generating circuit 22. When a phase comparison read timing signal (PCR) 16 is inputted to a clock input terminal of the circuit 22 in this state, a stuff control signal 23 is generated. Before the PCR signal 16 is given, a reset pulse is given to an AND gate 27. Since the reset pulse is blocked by an AND gate 27 since the stuff control signal 23 is not generated yet, resulting that the latch circuit 25 is not reset. Thus, the latch circuit 25 holds a stable set signal, it is kept given to the circuit 22 and the next PCR signal generates surely the stuff control signal. |
