发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize a highly integrated CMOS.LSI by attaining the annealing technic using an electric oven which is capable of small re-distribution of implanted impurity ions, large activation and small junction leakage by performing a heat treatment with a low temperature within a specified range. CONSTITUTION:After forming gate electrodes on an Si substrate, BF2 and P are selectively implanted in P-channel regions and N-channel regions respectively by gate electrode self aligning ion implantation so as to form an amorphous layer. The shallow amorphous layer of about 0.2mum thick which is formed by implantation of BF2 or P ions is recrystallized by a heat treatment with 700 deg.C for about 30min and with 800 deg.C for about 1sec. As activation and reduction of a leakage current are carried out at the same time as the recrystallization of the amorphous layer, the heat treatment with 700-800 deg.C achieves the formation of good junctions. In addition, in case of the heat treatment with a temperature 800 deg.C or less, diffusion of P and B is small and diffusion due to re-distribution can be ignored so that a fine MOS.FET becomes possible.
申请公布号 JPS6084825(A) 申请公布日期 1985.05.14
申请号 JP19830192109 申请日期 1983.10.14
申请人 SUWA SEIKOSHA KK 发明人 KATOU TATSUSATO
分类号 H01L21/265;H01L21/324 主分类号 H01L21/265
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