发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To prevent erroneous writing or erasing by setting an output to a high level when power source is turned on, setting the output to an low level when the power source potential becomes higher than a specified potential, and setting the level of a controlling input signal to the low level while the level of the output is high. CONSTITUTION:When Vcc potential 1-1 becomes about 1V after a power source is turned on, a flip-flop circuit 1-2 starts action and a node A is made to 0 level and a node B is made to 1 level by a capacitor 1-3 connected to the Vcc and a capacitor 1-5 connected to grounding potential 1-4. Built-in potential of a PN connection diode 1-6 is about 0.8V, and potential difference between the node B and node C becomes 0.8(V)X4=3.2(V). When the Vcc raises to about 1V after the power source is turned on, the potential of the node B becomes 1 level, and kept in 1 level while the Vcc is ascending, and becomes 0 level when Vcc exceeds 4V. Accordingly, the controlling signal is reset to 0 level while the Vcc potential is from 1V to 4V even when the controlling signal is in any level, and there is no possibility of erroneous writing or erasing.</p>
申请公布号 JPS6085498(A) 申请公布日期 1985.05.14
申请号 JP19830193461 申请日期 1983.10.18
申请人 TOSHIBA KK 发明人 MOMOTOMI MASAKI
分类号 H01L27/10;G11C16/02;G11C17/00;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L27/10
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