发明名称 C-MOS IC DEVICE
摘要 PURPOSE:To obtain the structure of contact holes whereby the improvement of the integration degree is contrived even in the case of a contact area of 4mum<2> or less by a method wherein the contact dimension of a P-channel MOS.FET is made smaller than that of an N-channel MOS.FET. CONSTITUTION:The source and drain diffused regions 12 and 13 of the P-channel MOS.FET and the source and drain diffused regions 14 and 15 of the N-channel MOS.FET are formed on both sides of a gate electrode 11. The contact holes 16 and 17 of the P-channel MOS.FET bored in an oxide film in order to lead out electrodes of Al and the like from the respective diffused regions are formed smaller than the contact holes 18 and 19 of the N-channel MOS.FET. For example, the dimension of the contact hole of the P-channel MOS.FET is 1mumX 1mum or approx. 0.5mumX0.5mum, and that of the N-channel one is 2mumX2mum. Thereby, the contact resistance in the contact of the P-channel MOS.FET reduces to approx. 1/2-1/10 with the same contact dimension, and the contact area is sufficient by 1/2-1/10 in order to obtain the same contact resistance.
申请公布号 JPS6084860(A) 申请公布日期 1985.05.14
申请号 JP19830192104 申请日期 1983.10.14
申请人 SUWA SEIKOSHA KK 发明人 IWAMATSU SEIICHI
分类号 H01L21/8238;H01L27/092;H01L29/78 主分类号 H01L21/8238
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