| 摘要 |
1,207,305. Semi-conductor devices. ASSOCIATED SEMICONDUCTOR MFRS. Ltd. 24 Oct., 1967 [24 Oct., 1966], No. 47537/66. Heading H1K. The periphery of the emitter electrode 16 of a planar transistor is uniformly spaced by at least 50Á from the insulation covered surfaceemergent portion 13 of the emitter/base junction, thus providing a uniform resistance path within the emitter region 11 between the periphery of the electrode 16 and the emitter/ base junction. The periphery of the base electrode 15 is closer to the junction portion 13 than that of the emitter electrode. The Si NPN device shown comprises an N+ Sbdoped substrate 1 carrying a phosphorusdoped epitaxial layer 2. Base and emitter regions 8, 11 are formed by diffusion of boron and phosphorus respectively. Al electrodes 15, 16 with thermocompression bonded Au leads such as 18 are provided, the substrate 1 being attached to a header by Au alloy for the collector connection. In another embodiment the emitter is annular, with the base region emerging at the surface both inside and outside the annulus and being provided with electrodes and leads at both sites. A third embodiment comprises a PNP Si planar transistor in which the emitter region (61, 62), Figs. 7, 8 (not shown), and its electrode (67, 68) are interdigitated with the base region (58) and its electrode (71, 72). In this case a P+ guard ring may be diffused into the collector region (52), and a "field relief" electrode may be provided on the insulating layer in the vicinity of the termination of the collector/ base junction. |
