发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To generate program control interruption to one processing part simultaneously with the interruption to another processing part by providing an FF, and an interruption control circuit, etc. which can be set up by an instruction holding the program control interruption. CONSTITUTION:When an processing part 2 executes instructions successively and executes an instruction to set up an FF7, the FF7 is set up. Consequently, an output signal from the FF7 is immediately informed to respective processing parts 2 through a signal line 8. If te state of the signal line 8 is changed, an interruption control circuit 9 detects an interruption request and allows the interruption request to interrupt an instruction execution part 6. The instruction execution part 6 accepts the interruption request at the end of the operation of the executing instruction to execute interrupting processing. Thus, the program control interruption request specified by a certain processing part 2 can be informed to all the processing parts at the end of the execution of the instruction of another processing part when the interruption is generated. If it is unnecessary to left the processing status at the generation of the interruption, it may be also available to set up an interruption masking setting circuit 11 to accept the interruption.
申请公布号 JPS6081648(A) 申请公布日期 1985.05.09
申请号 JP19830188519 申请日期 1983.10.11
申请人 NIPPON DENSHIN DENWA KOSHA;NIPPON DENKI KK;HITACHI SEISAKUSHO KK;FUJITSU KK 发明人 AOYAMA MASAO;NAKAMURA KOUICHI;YAMAGA MITSUHIRO;OGASAWARA SHIGERU
分类号 G06F9/46;G06F9/48;G06F15/16;G06F15/177 主分类号 G06F9/46
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