| 摘要 |
PURPOSE:To eliminate uselessness in a power source pattern in a chip, to utilize the wiring area for every kind of LSIs effectively and to reduce the area of the chip, by making it possible to change at least a part of functions of a commonly shaped pattern among the kinds of the LSIs in correspondence with the pattern, which is peculiar to the individual kind of the LSI. CONSTITUTION:A wiring pattern is constituted by a pattern common among the kinds of LSIs and a pattern, which is peculiar to the individual kind of the LSI. At least one part of the functions of the commonly shaped pattern among the kinds of the LSIs can be changed in correspondence with the pattern peculiar to the individual kind of the LSI. For example, on the common fixed pattern among the kinds of the LSIs, the common pattern for a power source wiring 81 for both TTL and ECL circuits and a bonding pad 82 is not connected to the power source pattern for any of the TTL and ECL. They can be connected by the individual pattern of the kind of the LSI, in correspondence with the mounting ratio of the TTL and ECL circuits in peripheral arrays. |
