| 摘要 |
PURPOSE:To make the titled device higher in integration by a method wherein the gate electrode of this device is constructed of common electrodes elongating in the direction of the array width and pair electrodes for P and N channels inserted between the common electrodes at a fixed interval. CONSTITUTION:P type diffused regions 23P and 24P are provided by sandwiching a gate electrode into a P-channel MOSFET element QP1, and P type diffused regions 24P and 25P are provided by sandwiching a gate electrode 42 into a P-channel element QP2. Likewise, N type diffused regions 23, 24, and 25 and the gate electrodes are used into N-channel MOS elements QN1 and QN2, which are then put into a basic cell 40 by arrangement. At this time, the electrodes 41 and 42 are used in common to both channels but provided separately from the other electrode pair 43P and 43N. When the cells are arranged in a vertical direction in such a manner, isolation regions are unnecessitated therebetween. |
