发明名称 INTERFACE CIRCUIT
摘要 PURPOSE:To obtain an interface circuit having a function supervising substantial open line state to an input signal line by providing a pair of switch means, a pair of latch circuits and a comparison coincidence circuit. CONSTITUTION:A P-channel MOSFETQ1 having a comparatively large ON-resistance is provided between an input signal line and a power supply voltage Vcc. Moreover, an N-channel MOSFETQ2 having comparatively large ON-resistance similarly as above is provided between the input signal line and a ground potential point of the circuit. Gates of the Q1, Q2 are used in common and a system clock phi of a microcomputer is fed to them. Latch circuits FF1, FF2 fetching an output signal of a data input buffer circuit DIB by timing signals phi1, phi2 generated respectively at the first half period and the latter half period of the signal phi are provided and an output signal of the FF1, FF2 is fed to an exclusive OR circuit EX. Thus, an open state between the input signal line and an external device is supervised in this way.
申请公布号 JPS6079821(A) 申请公布日期 1985.05.07
申请号 JP19830186773 申请日期 1983.10.07
申请人 HITACHI SEISAKUSHO KK 发明人 ITOU TAKASHI
分类号 H03K19/0185;G06F13/00;H03K19/21 主分类号 H03K19/0185
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