发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To obtain a high-reliability storage circuit by constituting a latch circuit with an inverter circuit consisting of a load means in the earth potential side of the circuit and a driving MOSFET and a CMOS inverter circuit to obtain stored information according with the resistance value of a variable polysilicon resistance. CONSTITUTION:A resistance R1 has a high resistance value if laser diffusion processing is not performed. Consequently, nodes N1 and N2 are charged up in accordance with the rise of a power source voltage Vcc. At this time, the node N1 is set to the high level before the node N2 is set and the node N2 is set to the low level because the conductance characteristic of an FETQ4 is set to a value larger than that of an FETQ1, and therefore, the FETQ4 is stabilized in the turn-on state. Consequently, the node N1 is set to the high level, and the node N2 is set to the low level. In this case, no floating parts are generated in the storage circuit. Consequently, an address signal a0 is set to the low level, and a signal a'0 is set to the high level. If the resistance R1 is subjected to laser diffusion processing, it has a low resistance value. Consequently, the earth potential is supplied to the gate of the FETQ1 in accordance with the the rise of the voltage Vcc at a power-on time. In this case, levels of address signals are opposite to the above.
申请公布号 JPS6079595(A) 申请公布日期 1985.05.07
申请号 JP19830186767 申请日期 1983.10.07
申请人 HITACHI SEISAKUSHO KK 发明人 YOSHITOMI YASUO;SASAKI YUKIO
分类号 G11C11/401;G11C11/34;G11C29/00;G11C29/04;(IPC1-7):G11C11/34 主分类号 G11C11/401
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