发明名称 MICROCOMPUTER DEVICE
摘要 <p>PURPOSE:To prevent a collision of a signal in a data bus, etc. by forming a CPU and a memory or an input/output device by a different substrate, providing a bi-directional buffer circuit on a bus line between them, and forming a floating state when a direction of a data is being switched. CONSTITUTION:A CPU1 and a memory 2 are connected by a data bus 3 through bi-directional buffer circuits 4a, 5a and 4b, 5b. A logical circuit 6 inputs and calculates a write control signal WR, a read-out control signal RD, an instruction fetching signal MI which is not shown in the figure, a memory operation control signal MREQ, an input/output circuit operation control signal IORQ, a clock signal, etc. from a CPU1. Also, this circuit outputs a memory write control signal MWT, a memory read-out control signal MRD and other various control signals which are not shown in the figure, controls read-out and write of a data, and forms a floating state when switching the direction of the bi-directional buffer circuits 4a, 5a and 5b, 4b. In this way, a collision of a signal on the data bus 3 can be prevented.</p>
申请公布号 JPS6079454(A) 申请公布日期 1985.05.07
申请号 JP19830187336 申请日期 1983.10.06
申请人 SONY KK 发明人 SETOGAWA TOSHIAKI;SONODA TAKENORI
分类号 G06F15/78;G06F13/36;G06F13/38;G06F13/42 主分类号 G06F15/78
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