| 摘要 |
PURPOSE:To improve the speed and accuracy of A/D conversion by outputting a converting data by the preceding A/D conversion from the least significant bit to the most significant bit in order in bit serial form during the present A/D conversion so as to improve the efficiency of A/D conversion. CONSTITUTION:An analog conversion output signal of a D/A converting circuit 11 and an analog input signal are compared for voltages at a comparator 12 in an A/D converting section 1, the result of comparison is discriminated with a logical processing circuit 13 and a digital signal is generated according to a prescribed algorithm based on the result of discrimination. On the other hand, a shift register 21 in a parallel serial converting output section 2 inputs a conversion output (parallel 8-bit) from the A/D conversion section 1 and the parallel bit is outputted serially from the least significant bit LSB to the most significant bit MSB in order. The efficiency of A/D conversion is improved by providing the A/D converting section and the parallel serial conversion output section 2 in this way, so as to improve the speed and accuracy of A/D conversion. |
