发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a wafer through activation and remove defect together with recrystallization by annealing amorphous layer which is ion-implanted at a high concentration for a short period of time in the order of second at 800-1,100 deg.C. CONSTITUTION:On manufacturing of MOS-VLSI, BF2<+> of 1X10<15>/cm<2> or more is implanted within an energy of 60keV or after implanting Si<+> of 1X10<16>/cm<2> or more within 40keV, B of 1X10<15>/cm<2> or more is implanted within 20keV to the source drain of Pch FET. Then, after forming the amorphous layer of about 0.2mum, such layer is annealed by holding for the predetermined seconds by the halogen lamp or graphite heater at 800-1,000 deg.C. With such processing, the annealing can be realized ensuring activation without dispersion of sheet resistance and diffusion by redistribution of impurity ion with small junction leak. It is effective for microminiaturization and high integration of high quality CMOSVLSI.
申请公布号 JPS6077419(A) 申请公布日期 1985.05.02
申请号 JP19830185569 申请日期 1983.10.04
申请人 SUWA SEIKOSHA KK 发明人 KATOU TATSUMASA
分类号 H01L29/78;H01L21/265 主分类号 H01L29/78
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