A method for sputtering a pin or nip amorphous silicon semi-conductor device having partially crystallised P and N-layers.

摘要

A high efficiency amorphous silicon PIN or NIP semiconductor device having partially crystallised (microcrystaline) P and N layers is constructed by the sequential sputtering of N, I and P layers and at least one semi-transparent ohmic electrode. The method of construction produces a PIN or NIP device, exhibiting enhanced electrical and optical properties, improved physical integrity, and facilitates the preparation in a singular vacuum system and vacuum pump down procedure.