DATA PROCESSING SYSTEM INCLUDING INTERNAL REGISTER ADDRESSING ARRANGEMENTS

摘要

Each processing unit (CPU) provided with a bus interface unit (BIF) conditioned with a code indicating the identity of the processing unit. The bus interface unit has a device to recognize identity addresses. This device is activated by presenting an address that includes a first field defining the identity of a processing unit and a second field. The second field is used to select one of the internal registers of the processing unit. The registers are accessed in the same way and machine instructions like LOAD, STORE and MOVE can be used for accessing.