| 摘要 |
PURPOSE:To facilitate easy identification of addresses by constituting an address history memory with the 1st and 2nd memory parts which store the contents of an information identification bit and a control memory address register in the form of the input data respectively. CONSTITUTION:The address of a control memory 2 can be designated with a word of a control memory address register 1 which holds a microinstruction fetch address and an operand address. The address histories are collected by a history storage address register 6, an address increment adder circuit 7 which updates the contents of the register 6 and an address history memory 8. Then the memory 8 is divided into the 1st and 2nd memory parts. The 1st memory part stores the information identification bit which identifies the address information, a microinstruction fetch address or an access address of the memory 2 produced by the microinstruction. While the 2nd memory part stores a control memory address. |
