发明名称 PAINT-OUT CONTROL CIRCUIT
摘要 PURPOSE:To detect at a high speed a paint-out boundary with simple hardware by setting the boundary information for each plain memory and leading each boundary coincidence/dissidence signal of each plain memory to a logical circuit to detect the paint-out boundary. CONSTITUTION:The boundary information is set every plain memory to a comparison value register 31 to designate an ON or OFF bit of the graphic pattern information as the paint-out boundary. A comparator 32 compares the contents of the register 31 with the output contents of a plain memory 14. The mask information is set to a mask register 33 to designate a plain excluded from the subject of detection for the paint-out boundary. Then the mask information is supplied to a mask circuit 34 to mask the output of the comparator 32. An AND gate 35 produces a logical signal to show whether or not the paint- out boundary is obtained according to each boundary coincidence/dissidence signal for each plain memory which is delivered from the circuit 34.
申请公布号 JPS6075966(A) 申请公布日期 1985.04.30
申请号 JP19830182727 申请日期 1983.09.30
申请人 TOSHIBA KK 发明人 HASEBE TSUNENORI
分类号 G06T11/40;G06T5/00 主分类号 G06T11/40
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