| 摘要 |
PURPOSE:To reduce the amount of hardware by generating an address generating circuits which are a half as many as indirect address elements read out of a vector register at a time. CONSTITUTION:Selector 28 select and output indirect address elements read out of a vector register storage unit 17-A0 (side 0) in two-pipe mode. The selectors 28 are interposed also between register storage units 17-B0 and 17-B1, 17-C0 and 17-C1, and 17-D0 and 17-D1. The selectors 28 select and output indirect address elements read out of vector register storage units on the side 0 in one-pipe mode firstly, and select and output indirect address elements read out of vector register storage units on a side 1 (17-A1) when a signal indicating the completion of address generation based upon the indirect address elements of the side 0 (17-A0) turns on. |
