| 摘要 |
PURPOSE:To enhance the accuracy in evaluation of a test by a method wherein a circuit, with which the input-output of a testing signal and its correction will be performed, is provided on the outside of a chip, thereby enabling to reduce the number of pads when a test is performed. CONSTITUTION:A circuit 2 which performs the phase correction of an input signal, a circuit 3 which performs the waveform correction of the input signal, and an output circuit 4 are provided on the external region of a semiconductor chip region 1. Pads 51-56 with which a signal necessary for test will be given are connected to the circuits 2, 3 and 4. Then, the input signal sent from the pad 54 is inputted in D-type FF12-15 in series, said input signal is synchronized with the clock signal inputted from the pad 51, and the input signal is memorized in the FF12-15. The signal inputted from pads 20-23 is inputted into the internal part of the integrated circuit through inverters 24-27, and it is outputted to pads 32-35. The output signal of the pads 32-35 is outputted to the pad 56 through the intermediary of D-type FF36-42. |
