| 摘要 |
<p>Protocol support and message buffering circuitry used to transmit call status, control and terminal management information bidirectionally over associated conductor (105) pairs as signalling messages between a system processor (113) and a telephone (102) and/or terminal (103) served by the system and connected to each conductor pair (105). This information is transmitted serially in a modified HDLC format (Fig. 3) as a one bit signalling field of a multiplexed data frame. At each transmitting end, the message information is converted from a parrallel to a serial format, transmitted serially as the signalling bit of successive frames, and reconverted to parallel at the receiving end. Ports (110) termine the system end of the conductor pairs and are mounted four to the board. Each board contains circuitry, such as registers and the like, common to the signalling message protocol support and message buffering circuitry to all four ports. The processor (112) scans, reads and writes these common registers via the I/O bus (107) to determine the status of each port and to exchange messages with the remote telephones and terminals served by the ports. Multiplexing is used on the signalling message so that the system processor (112) can direct a message individually to each of the plurality of station devices (102, 103) connected to the station end of each line (105). Protocol support is carried through to the processor (112) to support the error detecting capabilities of the protocol (Fig. 1).</p> |
