| 摘要 |
PURPOSE:To improve the efficiency of a CPU without increasing the memory capacity by folding a transfer request signal to an adaptor as a transfer permission signal simultaneously with the end of transmission of a received basic data to a memory is detected, and eliminating an option data fed from the succeeding said adaptor. CONSTITUTION:An adaptor controller 21 and a small capacity of memory 24 are provided additionally. A data (D1 D2 D3) outputted from a register 31 is fetched to the small capacity of FIFO register 34, and when a data is occupied in a register 34' of the final stage, a transmission request signal Sdd is generated and the first data signal Sdt is stored in a register 35. When the signal Sdd enters a direct memory access controller (DMAC) 12 and a transfer permission signal Sak is returned, the signal Sdt of the register 35 is transmitted to a bus 13. When the transmission of the basic data D1 is finished, the DMAC12 supplies a data transmission end signal Sde to a switch 22 and a gate 23 to change over the switch 22 thereby folding the signal Sdd to the register 35 as the signal Sak. Moreover, the signal Sde closes the gate 23 to eliminate the option data D2. |
