发明名称 OPERATING DEVICE
摘要 PURPOSE:To shorten an operating time by executing an operation of a carry input ''1'' and ''0'' from a lower rank, counting a value of this result and reading ''0'' of a complement of each digit, respectively, and selecting it. CONSTITUTION:An arithmetic unit executes an operation of an absolute value and normalizes its result, and it is constituted of the first and the second operand store registers 1, 2, operators 3, 4 of a carry input ''1'' and ''0'', an invertor 5, selectors 6, 10, an operation result store register 7, reading ''0'' counting circuits 8, 9, and a count number holding register 11. As for this operation, the first operand A is stored in the register 1 as it is, and the second operand B stores its complement in the register 2, and it is added by the operators 3, 4, respectively. It is inputted to the selectors 6, 10, respectively, in accordance with whether a carry exists or not, and also through the reading ''0'' counting circuits 8, 9. Subsequently, in accordance with a carry output, both outputs are selected, stored in the register 7 and 11, and a result required for the processing is obtained.
申请公布号 JPS6072021(A) 申请公布日期 1985.04.24
申请号 JP19830179623 申请日期 1983.09.28
申请人 NIPPON DENKI KK 发明人 SODA YOSHIHISA
分类号 G06F7/00;G06F5/01;G06F7/74;G06F7/76 主分类号 G06F7/00
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