发明名称 SYNCHRONISM FAULT DETECTING CIRCUIT OF PHASE LOCKED LOOP
摘要 PURPOSE:To eliminate the defect that a PLL lock fault detecting circuit responds too much to the operation of a switch by providing a voltage discriminating device detecting a prescribed level of an output voltage of a phase comparator in a phase locked circuit, an integration circuit integrating an output voltage of the voltage discriminating device and a memory circuit storing an output of the integration circuit. CONSTITUTION:The voltage discriminating device 12 and the memory circuit 14 correspond to the voltage discriminating device 10 and the memory circuit 11 of a conventional circuit. Moreover, the integration circuit 13 consists of a simple CR circuit having a time constant tau or the like. The integration circuit 13 suppresses a very fast change in the output voltage of the voltage discriminating device 12 and selects a comparatively slow change and gives the result to the memory circuit 14. The time required for the switching operation of the switch 8 is very short normally and the relocking of the PLL as the result is finished in a very short time. An output voltage change of PD based on a fault of the PLL is normally slow against the result. Thus, the discrimination of fault at the operation of the switch is made ineffective by utilizing this point.
申请公布号 JPS6072415(A) 申请公布日期 1985.04.24
申请号 JP19830181503 申请日期 1983.09.29
申请人 FUJITSU KK 发明人 CHIBA KAZUHARU;HASHI TOSHIO;NAKAJIMA YOSHIBUMI
分类号 H03L7/095 主分类号 H03L7/095
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