发明名称 VECTOR PROCESSING DEVICE
摘要 PURPOSE:To execute at a high speed extension and conversion of a vector by processing in parallel plural vector elements at the same time. CONSTITUTION:A vector processing device has a parallel vector register part 1, an aligning circuit 2, an extension and conversion control circuit 3, a read-out data bus 1000, a write data bus 2000 and a mask data read-out bus 1300. A parallel vector register part 1 has a mask data register, an operand vector register and a result vector register. A vector element read out in parallel from the operand vector register is supplied to the aligning circuit 2 through the data bus 1000, and a mask element read out of the mask data register is supplied to the extension and conversion controlling circuit 3 through the mask data read-out bus 1300. Also, the vector element is transferred to the parallel vector register part 1 through the write data bus 2000 from the aligning circuit 2.
申请公布号 JPS6072071(A) 申请公布日期 1985.04.24
申请号 JP19830179624 申请日期 1983.09.28
申请人 NIPPON DENKI KK 发明人 SUWADA MAKOTO
分类号 G06F17/16;G06F15/78;(IPC1-7):G06F15/347 主分类号 G06F17/16
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