| 摘要 |
A semiconductor memory comprises a plurality of memory cells (1), each including a switching transistor (3) switched in response to a clock signal through a word line (8, 27) and a storage capacitor (2) for storing data. The data is read out to a bit line (5) in response to the switching of the switching transistor (3). A respective pull-down transistor (21) is connected to the respective word line (8, 27). In response to an ON state of the pull-down transistor (21), the corresponding word line (8) is connected to a voltage generating source (32) for generating a voltage lower than the level of a logical "0" of the data.
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