发明名称 SPEED DETECTING SYSTEM USING BIT-RING COUNTER
摘要 PURPOSE:To make it possible to detect the rotary state of a rotary system in detail, by adding the signal from the rotary system to a bit ring counter while selecting one output of FF constituting said counter to perform counting by the other counter. CONSTITUTION:Flip-flop (FF) circuits 1-4 are connected in series and the output of the FF circuit 4 is connected to the input terminal of the FF circuit 1 to constitute a bit ring counter. A counter CNT 5 is provided so that either one of outputs from the FF circuit 1-4 is selected to be counted as a figure-up signal. A circuit 1-4 is selected to be counted as a figure-up signal. A rotary state is displayed while a figure, wherein a preset signal PS is imparted to a set terminal S by initialization, is shifted by a physical clock CK1 applied to the clock terminal C of FF. By counting the figure-up signal, the speed of a physical phenomenon, that is, for example, the rotation number within the unit time of a magnetic disc is counted. By selecting an angle showing a proper state as the figure-up signal, optimum control can be performed.
申请公布号 JPS6070362(A) 申请公布日期 1985.04.22
申请号 JP19830178091 申请日期 1983.09.28
申请人 FUJITSU KK 发明人 ITOU GINNO
分类号 G01D5/244;G01D5/245;G01P3/44;G01P3/489 主分类号 G01D5/244
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