| 摘要 |
PURPOSE:To improve the function of information processing of a semiconductor IC, and to enhance yield by selectively introducing an impurity to a semiconductor substrate or a semiconductor layer in the lower section of a gate electrode in a first MIS transistor or a second MIS transistor. CONSTITUTION:A first cell transistor is formed to a P type Si substrate. An SiO2 insulating film is formed on the substrate, and an SiO2 insulating film 9 with first openings 8a, 8b exposing one parts of the surfaces of first source and drain regions 6, 7 is shaped on the first cell transistor. A polycrystalline Si layer is formed on the substrate, and a second polycrystalline Si gate electrode 12 is shaped, and the ions of an N type impurity such as As are implanted selectively to the surface of a P type single crystal Si layer 10 to form a second N<+> type source region 13 and a second N<+> type drain region 14. An opening H exposing the upper section of the cell transistor is formed, an impurity such as B<+> is implanted selectively from the opening H, and a P<+> type layer 15 in impurity concentration higher than the substrate is shaped to the surface of the P type substrate 1 in the lower section of a gate electrode such as one 5 in a cell transistor such as the first one through predetermined activating heat- treatment. |
