发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To increase the density of a CMOS integrated circuit by oppositely forming a P well and an N well and separating both wells by a thin insulating region. CONSTITUTION:An N<+> region 15 and a P<+> region 16 are formed to an N type Si substrate 10, and an epitaxial layer 17 is grown. Projecting columns 18 and 19 are formed through dry etching, and the ions of a P type dopant and an N type dopant are implanted to each column, and a P type projecting column 18 and an N type projecting column 19 are shaped. A thermal oxide film and an isolation insulating film 20 betweend both projecting columns through a CVD method are formed, a field oxide film 21 is shaped in an isolation region, and a gate oxide film 21 is further formed. Each crystal Si and a film made of a refractory metal, etc. are applied on the whole, and dry etching having strong directional properties is executed to the whole. An inter-layer insulating film 22 is applied, a connecting hole 24 is formed to a desired section, and electrodes 231-233 made of Al, etc. are shaped.
申请公布号 JPS6070757(A) 申请公布日期 1985.04.22
申请号 JP19830177957 申请日期 1983.09.28
申请人 HITACHI SEISAKUSHO KK 发明人 SUNAMI HIDEO
分类号 H01L27/08;H01L21/8238;H01L27/04;H01L27/06;H01L27/092;H01L29/78 主分类号 H01L27/08
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