| 摘要 |
PURPOSE:To reduce the parasitic capacity at a sense nodal point by precharging a bit line up to the sum of the threshold voltage of a driver MOSFET, whose gate the bit lines is connected to, and a reference voltage and amplifying the potential difference of the bit line. CONSTITUTION:If the threshold voltage of a transistor TRT1 is low and that of a TRT2 is high, a voltage ''VR+VTH2'' is put on a bit line BL1; and when a timing signal phiT is in the level of a high voltage VP and TRs T11 and T12 are turned on, respective gm of TRs T1 and T2 are corrected to be equal to each other because the gate voltage of the TRT1 is low and the gate voltage of the TRT2 is high, and an accurate potential difference between a cell 11 and a dummy cell 12 is read from them. A parasitic capacity CN consists of only a diffusion capacitance and is reduced easily to a half or less of the parasitic capacity in a conventional example, and consequently, the sense sensitivity is improved in comparison with a conventional circuit. |
