发明名称 |
CODE GENERATING SYSTEM FOR CARRY SAVE ADDER |
摘要 |
PURPOSE:To ensure a suitable application of a carry save adder to a multiplier circuit of multiple generating system by obtaining a full sum of a 2-bit code part which is adjacent to data parts of the sum and the carry respectively to transmit the code and combining this code and the prescribed value to produce a correct code. CONSTITUTION:The multiplicand data of a multiplicand register 1 and the least significant data of the multiplier register 2 are supplied to a multiple generating circuit 3-1 to produce a multiple of 8 faces. In the same way, the multiplicand data of the register 1 and the next digit data of the register 2 are supplied to a multiple generating circuit 3-2 to obtain a multiple of 8 faces. The multiple produced from the circuit 3-1 is added to a tree group 4-1 of a carry save adder CSA to deliver a sum 7 of 2 faces and a carry 8. At the same time, these sum 7 and carry 8 obtained with low-order digits are matched with a sum 9 and a carry 10 obtained with high-order digits and added together by a CSA5 and a CSA6 respectively. |
申请公布号 |
JPS6068432(A) |
申请公布日期 |
1985.04.19 |
申请号 |
JP19830175994 |
申请日期 |
1983.09.22 |
申请人 |
HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK |
发明人 |
OOKAWA TOMOYUKI;MURAYAMA HIROSHI |
分类号 |
G06F7/505;G06F7/50;G06F7/52;G06F7/53;G06F7/533 |
主分类号 |
G06F7/505 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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