| 摘要 |
PURPOSE:To simultaneously form a timing signal and a delayed strobe signal with high accuracy, by forming a test cycle signal, the delay signal thereof and a clock signal synchronous to both signals while counting and delaying said clock signal. CONSTITUTION:In order to form a delay test synchronous signal obtained by delaying a test cycle signal 11 over a definite time (TRTD), a counter 47 and a delay line 49 read a delay time from delay memory 48 to load the same to the counter 47 and holds the value, obtained by applying adding operation to the values held to a register 52 by an adder 51, to the register 52 to set the delay time of the delay line 49. Therefore, a delayed test cycle signal 26 is outputted so as to be delayed over the delay time with respect to the test cycle signal 11 formed by a start control circuit 36. |
