| 摘要 |
The apparatus has a speed detector (15, 13, 12) for detecting the speed Va of an induction motor 14, speed command means for producing a command speed VCMD, and an error amplifier 1 for amplifying a difference between the detected motor speed Va and the command speed VCMD. The motor 14 is driven by controlling the amplitude of the primary current as to vary the amplitude of the secondary current in accordance with the difference between the detected and command speeds.
<??>A two-phase sinusoidal wave generating circuit 11 generates two sinusoidal signals (Imcos phi , Imsin phi ) displaced in phase from one another by pi /2 and whose amplitudes (Im) conform to the output Er of the error amplifier 1. A primary load current arithmetic circuit 33 computes a primary load current by employing the output Er of the error amplifier 1 and the output of the two-phase sinusoidal wave generating circuit 11, and a primary current arithmetic circuit 34 computes a two-phase primary current command (I1a, I1b) by adding the primary load current to the output of the circuit 11, which output serves as an excitation current. The induction motor 14 is driven by the primary current command having excitation current component and a primary load current component the amplitudes of which vary in accordance with the difference between the rotational speed of the induction motor and the command speed. |
