| 摘要 |
PURPOSE:To reduce the undesired use of logic units in cell rows by previously arranging conductor resistance units on a wiring channel and utilizing the conductor resistance units as retardation elements, resistance elements, capacitance elements or wiring themselves. CONSTITUTION:Conductor resistance units 6 are disposed previously on wiring channels 5 among fundamental cell rows 2 for a gate array 1 and among the fundamental cell rows 2 and input/output cell rows 3. The conductor resistance units 6 are constituted by polysilicon, and terminal leading-out ports 8 are utilized for electrical connection with logic units in the cell rows and among the conductor resistance units 6. The conductor resistance units 6 have resistance per unit length and capacity, and are utilized for retardation elements, input pull- down resistors and pull-up resistors in a logic circuit or time constants in monostable multivibrators, etc. or can be utilized as wiring themselves by connecting and utilizing a desired number of the conductor resistance units. |
