| 摘要 |
PURPOSE:To make flexible wiring possible and perform high-speed and efficient transmission with a relatively small occupation space by operating plural operating circuits with multi-phase clocks to process modulating and demodulating operations and constituting the intersection of the wiring between the operating circuits and between the operating circuits and a multi-phase clock source with plural layers formed with minute work and an etching method. CONSTITUTION:A demodulating circuit DEM processes a timing processing circuit, etc., and a clock generating circuit CL supplies sampling clocks to the circuit DEM. A double line 2 out of the output lines of the circuit DL is used for multi-phase clocks having clock intervals T2, and a double line 1 is used for multi-phase clocks having clock interval T2. The circuit DEM generates the output of the timing processing circuit also, and it is obtained on an output line 3. In this unit, all blocks are realized with monolithic structure. For example, individual blocks are not connected on the same layer, but the connection lines of the individual blocks are extended to different work layers, and the connection lines are subjected to an etching processing for inter-block connection on these layers. |
