| 摘要 |
The gain margin of a junction FET oscillator is improved by the addition thereto of a bipolar transistor in parallel with the FET for boosting the closed loop circuit gain of the oscillator without degrading the phase noise performance of the FET. The oscillator circuit is formed by a grounded gate JFET with a feedback circuit including the internal impedance of the FET, a capacitor which couples source and drain of the FET, a capacitor which couples the FET source to ground, and a resonant circuit coupled between the drain of the FET and ground including a varactor diode for controlling the oscillating frequency and providing a circuit output. A bipolar transistor is coupled in parallel with the FET by coupling its collector to FET's drain and its emitter to the FET's source. The base of the transistor is coupled via a by-pass capacitor to circuit ground.
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