摘要 |
PURPOSE:To rearrange data at a high speed and with high efficiency by giving a sort instruction to a data processor and processing the gathering of variable length data to be rearranged by means of hardware prepared by an instruction. CONSTITUTION:When a sort instruction is executed, 0 is set to a new MID (identifier showing the quantity of data) register NMIDR8 in case the rising order is designated and in accordance with the rising order sort or the falling order sort (the order of data quantity). Hereafter +1 is added with each increment of data. While 1 is set in all cases when the falling order is designated. Hereafter -1 is added with each decrement of data. Then the input data and the MID are supplied to a sorter logical part 6 from vector register Vj2 and Vi3 respectively by N elements according to each element. Thus the data of N elements are sorted. The result of this sorting is delivered to an output data register ODATAR9 and stored every element and in accordance with the sorting order. |